This invention pertains to the field of electronic circuits for driving reflective liquid crystal displays (RLCD).
In an RLCD having a matrix of m horizontal rows and n vertical columns, each m-n intersection forms a cell or picture element (pixel). By applying an electric potential difference, e.g., voltage, across a cell, a phase change occurs in the crystalline structure at the cell site and causes the pixel to change the incident light polarization vector orientation, thereby blocking the light from emerging from the electro-optical system. Removing the voltage across the pixel causes the liquid crystal in the pixel structure to return to the initial xe2x80x9cbrightxe2x80x9d state. Variations in the applied voltage level produce a plurality of different gray shades between the light and dark limits.
Since an RLCD panel presents essentially a capacitive load to any drive circuit, a pulsed voltage ramp is typically employed to avoid high current spikes that are associated with driving such a capacitive load. At the individual columns is a comparator and a track-and-hold gating switch for terminating the individual column voltage rise when the column capacitance has charged to the predetermined voltage level needed to produce a particular grayscale, with each column terminating at a unique level along the global voltage ramp, thus producing a separate pulse-length modulating signal for each individual column.
At the end of a predetermined row time interval, the column charges stored in the intrinsic column capacitances are discharged to a reference voltage and the procedure is repeated for the next row. This process is repeated for all the m rows of the LCD to complete a single frame. Repetition of the frame activity allows for the continual updating of the displayed information. To better appreciate the above process, it would be beneficial to review U.S. Pat. No. 4,766,430 to Gillette, et al, which is herein incorporated by reference.
Further, a non-linear gamma correction signal that is required to generate a required color distribution over the entire panel is superimposed on the ramped voltage waveform. This gamma correction typically requires a digital bit resolution of 8 bits which when combined with the voltage ramp data produces a requirement for 13 bit resolution data words for the ramp signal generator. The principal drawback such an implementation is that such high bit resolution is difficult to integrate and dissipates higher power than a lower resolution solution.
An equally significant drawback of this prior art, however, is the noise associated with the voltage switching of the capacitive load of the LCD and the termination of the individual column charging by means of a gate. This noise capacitively couples into adjacent pixels and interferes with the display of accurate pixel data.
Thus, there is a demonstrated need for an improvement of existing voltage-driven RLCD column driver circuits which would lower the resolution requirements of the drive circuitry in addition to reducing the instantaneous column switching currents and the associated crosstalk interference.
A system for generating an image in an RLCD from an Integrating Digital-to-Analog Converter (IDAC) having a current pulse output rather than a voltage pulse output. The current pulse output is integrated and filtered by the intrinsic capacitance of an RLCD panel column to reduce noise in and power consumption by the RLCD.
This IDAC is driven by a Look-Up-Table (LUT) within a Random Access Memory (RAM) used to store six bit time-derivative digital values of a non-linear gamma correction curve. These digital values are continually adjusted by an auto-correction module based on comparison between the resultant integrated column voltage and a fixed reference voltage for each color.